Which PWM outs are 'shared' on a cerbuino? i.e. have same frequency

[Brett]

If only you quoted more of the article…

@Aron_Phillips

Here is a complete list of the timer to channel pins for the Cerbware:

//                         C6,A7,C7,A8,B0,B1,B5,B4,B3,B11,B10,A10,A9,A15, B8, B9
 #define STM32F4_PWM_TIMER { 8,14, 8, 1, 3, 3, 3, 3, 2,  2,  2,  1, 1,  2,  4,  4}
 #define STM32F4_PWM_CHNL  { 0, 0, 1, 0, 2, 3, 1, 0, 1,  3,  2,  2, 1,  0,  2,  3}
 #define STM32F4_PWM_PINS  {38, 7,39, 8,16,17,21,20,19, 27, 26, 10, 9, 15, 24, 25}

That’s the source. Any PWM that shares the timer number (eg pwm0 & 2; pwm4/5/6/7) cannot have an independent frequency.