I ported my Panda 2 RLP music driver to the Cobra 1. Cobra 1 and Spider are both EMX controllers, and therefore the driver should work on the Spider as well.
https://www.ghielectronics.com/community/codeshare/entry/805
Due to the available I/O lines on the Cobra UEXT connector, I ended up using SPI 2 and several GPIO pins that are not available on the two S connectors of the Spider. However, I created a header file for the RLP driver that should map those I/O lines to the Gadgeteer X9 connector of the Spider.
I don’t own a Spider, so I can’t test it, but I’m including the header file here if someone out there wants to give it a try. Note: This is not a Gadgeteer module driver, it uses plain old NETMF. If someone wants to port it to a Gadgeteer module that would also be great!
///////////////////////////////////////////////////////////////////////////////
//
// VS1053b RLP Driver Header for Spider Micro Controller
//
///////////////////////////////////////////////////////////////////////////////
//-----------------------------------------------------------------------------
// Spider (EMX) connected to VS1053b on Gadgeteer connector X9
//-----------------------------------------------------------------------------
//
// DREQ Gadgeeter.X9.Pin.03 EMX.IO46 P0.13
// RESET Gadgeeter.X9.Pin.04 EMX.IO6 P0.25
//
// XDCS Gadgeeter.X9.Pin.05 EMX.IO7 P0.26
// XCS Gadgeeter.X9.Pin.06 EMX.IO15 P3.25
//
// SCK Gadgeeter.X9.Pin.09 EMX.IO27 P0.15
// MISO Gadgeeter.X9.Pin.08 EMX.IO25 P0.17
// MOSI Gadgeeter.X9.Pin.07 EMX.IO24 P0.18
//
// RED none
// GREEN none
//
//-----------------------------------------------------------------------------
// VS1053b interface config for SSP0 (SPI1)
//-----------------------------------------------------------------------------
//
#define DREQ_GPIO_CLR PINSEL0 &= ~((0x03 << 26)) // set as GPIO
#define RESET_GPIO_CLR PINSEL1 &= ~((0x03 << 18)) // set as GPIO
#define DREQ_GPIO_SET FIO0DIR &= ~(1 << 13) // set as input
#define RESET_GPIO_SET FIO0DIR |= (1 << 25) // set as output
#define XDCS_GPIO_CLR PINSEL1 &= ~((0x03 << 20)) // set as GPIO
#define XCS_GPIO_CLR PINSEL7 &= ~((0x03 << 18)) // set as GPIO
#define XDCS_GPIO_SET FIO0DIR |= (1 << 26) // set as output
#define XCS_GPIO_SET FIO3DIR |= (1 << 25) // set as output
#define SCK_GPIO_CLR PINSEL0 &= ~((0x03 << 30)) // set as GPIO
#define MISO_GPIO_CLR PINSEL1 &= ~((0x03 << 2)) // set as GPIO
#define MOSI_GPIO_CLR PINSEL1 &= ~((0x03 << 4)) // set as GPIO
#define SCK_GPIO_SET PINSEL0 |= ((0x02 << 30)) // set as SCK
#define MISO_GPIO_SET PINSEL1 |= ((0x02 << 2)) // set as MISO
#define MOSI_GPIO_SET PINSEL1 |= ((0x02 << 4)) // set as MOSI
#define SCI_CLOCKF_CFG 0x8800 // 3.5x multiplier, 1.0 add, 12.288 MHz clk
#define SCI_MODE_CFG 0x0802 // allow MPEG I & II, VS1002 native mode
//-----------------------------------------------------------------------------
// VS1053b Control
//-----------------------------------------------------------------------------
//
#define DREQ (FIO0PIN & (1UL << 13)) // is DREQ high?
#define RESET_SET (FIO0SET = (1UL << 25))
#define RESET_CLR (FIO0CLR = (1UL << 25))
#define XDCS_SET (FIO0SET = (1UL << 26))
#define XDCS_CLR (FIO0CLR = (1UL << 26))
#define XCS_SET (FIO3SET = (1UL << 25))
#define XCS_CLR (FIO3CLR = (1UL << 25))
//-----------------------------------------------------------------------------
// SSP0 (SPI1) config and control
//-----------------------------------------------------------------------------
//
#define SSP0_PWR_ON PCONP |= (1 << 21) // power on
#define SSP0_INT 10 // TFE interrupt
#define SSP0_INT_OFF 0x00 // disable interrupts
#define SSP0_INT_ON 0x08 // enable TFE interrupt
#define SSP0_CR0 0x07 // set DSS data to 8-bit, Frame format SPI, CPOL = 0, CPHA = 0
#define SSP0_CR1 0x02 // enable in master mode, normal operation
#define SSP0_CLKP_RD 0x12 // clk prescalar for reads = 18 yields 4.0 MHz
#define SSP0_CLKP_WR 0x0A // clk prescalar for writes = 10 yields 7.2 MHz
#define SSP0_CLKP_RST 0x48 // clk prescalar for reset = 72 yields 1.0 MHz
#define SSP0_TFE (1 << 0) // transmit fifo empty
#define SSP0_TNF (1 << 1) // transmit fifo not full
#define SSP0_RNE (1 << 2) // receive fifo empty
#define SSP0_RFF (1 << 3) // receive fifo full
#define SSP0_BSY (1 << 4) // SSP0 busy
//-----------------------------------------------------------------------------
// LED Config
//-----------------------------------------------------------------------------
//
#define RED_GPIO_SET // none
#define GREEN_GPIO_SET // none
//-----------------------------------------------------------------------------
// LED Control
//-----------------------------------------------------------------------------
//
#define RED_ON
#define RED_OFF
#define GREEN_ON
#define GREEN_OFF
//-----------------------------------------------------------------------------
// RLP Constants
//-----------------------------------------------------------------------------
//
#define TASK_INTERVAL 10000 // (uSec)