SPI - CS changes between buffer element writes?

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1

Hi Guys,

I am pretty sure this is not possible from the docs but just thought I would check with you lot.

I am connecting to some MCP4922 Dacs, each IC has two 12 bit DACS.

The data is latched to each DAC when the CS goes high, so to write to both dacs at the same time you need CS=low,16bits,CS=high, CS=low, 16bits, CS=high.

Now I can do this with two calls to SPI.Write but the overhead of the call is high. I would really like to write a buffer with two 16bit elements with CS going high/low between each element being sent.

Is there anyway of setting up the SPI.Configuration to make it work like this?

Thanks for any help

Andy

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I thought, reading a page on this forum somewhere, That you have to create an SPI configuration for each device… If Chrisophe ( bec a fuel ) can produce a multi-broadcast on the I2C bus it may be possible to do the same with the SPI.

Its on fezzer… He may be able to help you do the same…

Cheers Ian

Sorry scratch that… I just re-read the post both dac’s are in one chip, the selection of A & B dac’s are in the very top nibble of the 16 bit element. This is job for GHI i think.

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or You can take controll of CS for Yourself. E.g. hook cs pins on any io pin and set both to high or low before transmiting any data.

and if you won’t read any info from those, you can try to tie both cs to the same fez pin.

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I have seen this requested before, that is toggling CS on every transfer vs on the whole transfer. This is not currently supported but would be nice to add in future.

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Hi Guys,

Thanks for the reply.

Gus: Yep would be nice to have that is for sure, I will carry on with multiple calls then.

All the best

Andy