Reducing Noise at the ADC Input

On my FEZ Domino I have ADC pin A0 connected to a low power amplifier for the signal I want to measure. If I use the + 5v available from the FEZ board to power may amp I get a high frequency noise level of about 150 mv peak to peak (scope photo attached). If I power the amp from a separate 5 volt supply the noise level drops to less than 30 mv PP (photo attach, I would, but forum says only one).

Does anyone have any suggestions for how I might reduce the noise level when the amp is powered of the FEZ 5V pin? Tying the other A/D inputs to ground doesn’t help. It also doesn’t help if I supply the FEZ with my own 5V supply - the noise is there when the amp is powered by the FEZ.

The amp works fine with another ARM SBC I’m testing - input noise levels are less than 50 mv pp so I’m sure it’s not the amp. I’d prefer to use the FEZ so any help in reducing this noise level would be appreciated.

I just can’t read the scope… What frequency are you at.

Cheers Ian

You can use ferrite-beads to isolate noise

…[italic]I just can’t read the scope… What frequency are you at.[/italic]

The time sweep is 1 ms/div. I believe the noise is probably at the processor clock rate or some sub-multiple, but I’ll check later & get back to you.

…[italic]You can use ferrite-beads to isolate noise[/italic]

where would you put the beads, Gus?

1ms/div equates to 1khz So the noise appears to be around 50 to 100khz.

Are you using input capture atall? SPI? etc…

Although linear regs do produce noise at these frequencies. Have you tried a larger elec cap say 100uf across the 3.3v to gnd to see if it gets any better?

Also if it is derived from the regs, you would see this noise on the 5 and 3.3v rail, you would be able to trace the source.

Cheers Ian

Power tour amp through a ferrite bead…in series on power line. A 10uH coil and a decoupling capacitors will help too.

Here is a simple example, digital on top and analog on bottom

Thanks to you both for the suggestions. Ian R you have some well calibrated eyes. The noise is 150 mv pp at ~300 KHz and 350 mv pp @ ~10 KHz.

A 100 uF cap on the 5V supply dropped the noise to below 50 mv pp so I’ll keep the ferrite beads and coil for implementation later in the design. I could have just tried the cap to begin with, but I wanted some expert opinions to make sure I wasn’t going to damage the board.

By the way, if it is of use to anyone else with a similar set up, I’m temporarily using a diode in series with the 5 volt supply to drop Vcc to my opamp down to 4.4V. The opamp output swing then is limited to about 2.9 volts so the accurate ADC limit of 3.3 V is not exceeded. A better design might be voltage divider since diodes also add some noise - the diode was just convenient for some quick testing. Right now the added capacitor is at the + side of the diode on the opamp Vcc pin.

Also, IanR, I’m not sure what [italic]“Are you using input capture atall? etc”[/italic] means. If you have time for one more response, I’d be interested in some enlightenment. I’m not using spi.

Thanks again for the help Gus & IanR.

The diode will also create noise…

The reference to the input capture was to ensure there were no internal noise generated that would contribute… SPI is 100khz / 200khz Pin capture could be same…

Cheers Ian

If you are powering it over USB the computer should also be inducting noise as well, try a notebook working on batteries and you should see it reduced too.