Hi.
In pulse counter module source code there’s an error that prevent use of DFLAG signal.
The correct MDR1Mode enum is:
private enum MDR1Mode : byte
{
LS7366_MDR1_4BYTE = 0x00, // 4 byte counter mode
LS7366_MDR1_3BYTE = 0x01, // 3 byte counter mode
LS7366_MDR1_2BYTE = 0x02, // 2 byte counter mode
LS7366_MDR1_1BYTE = 0x03, // 1 byte counter mode
LS7366_MDR1_ENCNT = 0x00, // enable counting
LS7366_MDR1_DICNT = 0x04, // disable counting
LS7366_MDR1_FLIDX = 0x10, // FLAG on IDX (index)
LS7366_MDR1_FLCMP = 0x20, // FLAG on CMP (compare)
LS7366_MDR1_FLBW = 0x40, // FLAG on BW (borrow)
LS7366_MDR1_FLCY = 0x80, // FLAG on CY (carry)
}