First attempt. Need to play with the settings
Nice 
@ Architect,
Yeah, the most fun is playing with the materials editor…
I find that making the PCB a Varnish finish with a Gloss or Semi-Gloss works well.
Ok, I have put first part (DaisyLink protocol)
There will be 2 may be 3 more parts.
2. AVR(Arduino) library for DL
3. Arduino sketch for my Piezo DL module
4. 2 Helper modules (one to program AVR chip and the other one to upload sketches to a DL module)
@ Architect, the article looks great, will read it first thing tomorrow morning. I always wanted to create blog entries like that but for me writting anything other than source code takes forever…
+1 on blog greatness. It deserves its own topic here.
Thank you guys! I will put another topic in the Gadgeteer section after I will finish all the parts. I might have part 2 done this weekend.
I also have another DL Module almost done as well. It is DL 7 Segment display module. You can chain as many of them as you want. It is DL after all ;D.
I will have a demo of chaining 6 of them to make a clock.
tweeted. looking forward to seeing more.
Great job! I’ve been waiting for this for a long time 
I can’t wait for the rest of the posts. What’s a “configuratrion”? Is that similar to a neutron? See Fig 2.
I think it’s closer to a Higgs Boson… one of those hard to observe God particle thingies
Fixed :-[
BTW, Architect I’d love to see you do a post on just using BusPirate as a logic analyzer. I’d seen that thing around but had no idea it could be used like that and the BusPirate page makes no mention of SUMP. That looks like one heck of a deal. Are you using v3 or v4? v4 appears to still be a beta product. Do you know if it’s far enough along to bother with?
An idea, why not use the SUMP software with a fez? Whatever fez is the logic analyzer?
I’m certainly no expert but wouldn’t the FEZ have to be programmed almost entirely in RLP to get the kind of output needed for a logic analyzer? Where would NETMF benefit it unless you were going to make it totally stand-alone and try and port SUMP to NETMF. The Bus Pirate is only an 8Mhz 16-bit PIC, so there’s plenty of power in the FEZ. For me the big question would be “why?” when the BP is $30 and there’s a OSH community already built around it making continuous improvements. I’d rather pay $30 for the tool and do fun stuff with the FEZ
You already have a fez so you can save $30 plus it is fun
You only need to implement a multi pin capture in RLP. Very easy.
Hmmm… You get that demo ready by Monday and I’ll order another Panda-II instead to use as a dedicated logic analyzer 
I promise you that if you can prove you can interface to that software.
Hmmm… The SUMP documentation on how to interface with it seems a bit lacking. Definitely will require more time than I have at the moment. I’m going to keep thinking about this though. Maybe Architect has some insight since he’s actually used the software.
On a similar note… I’ve quickly exceeded the abilities of the DSO Nano I recently purchased and will probably be upgrading to a real bench scope soon. Are you still happy with the Atten you recently purchased? It can only analyze two signals at once though, right?
I have BP v3a. I am using it for a lot of things. It is very handy tool. Here is documentation on how to use it in logic analyser mode.
http://dangerousprototypes.com/2009/11/03/bus-pirate-logic-analyzer-mode/
@ Gus
Interesting idea. Hmm, let me dig around for a bit.
@ janlee. You may also want a look at Logic Analyzers from Saleae - #1 with Professional Engineers saleae logic. 8 channels up to 24Mhz samples. Probably more then ever need for most embedded projects and real reasonable for what you get at $149. Neat packaging and neat software, good blend. I actually found a pwm “issue” using this device that I think MS fixed in current sdk, but have not verified that yet.