I am looking of a table or diagram that maps Fez Panda III’s pins to the .NETMF nomenclature (like, PAx = Cpu.Pin.GPIO_Pin1). The schematic doesn’t do it.
Could someone point me in the right direction please?
yeah, don’t use the strict Cpu.Pin numbers, use the GHI provided abstractions
Thank you for the pointer and recommendation. Am I correct that
- GHI.Pins.FEZPandaIII.Gpio.A1, A2, etc. map to PA1, PA2,
- Some of the GHI.Pins.FEZPandaIII.Gpio pins greater than 15 (D20, D21…) don’t actually exist?
Thanks again -
no, you’re wrong. The pins map to the way they’re marked on the silkscreen. Forget PAx because that is the nomenclature for the STM32 based devices, and this is not one of them. You can see the pins best in the face-on shot in https://www.ghielectronics.com/catalog/product/256.