Does anyone happen to know the ADCCLK speed on Cerberus?
42MHz
And the sampling time in the Cerberus source is configured to 28 cycles, this means 28 cycles of the ADCCLK, correct?
That means that the 28 cycle sample time is about 0.67 microseconds?
The configurable ADC sample times are these:
000: 3 cycles
001: 15 cycles
010: 28 cycles
011: 56 cycles
100: 84 cycles
101: 112 cycles
110: 144 cycles
111: 480 cycles
It would be necessary to use the 480 cycle setting in order to get sample times of 5us or more?