ADC Register access with GHI.OSHW.Hardware.LowLevel on Cerbuino

JackN · January 11, 2013, 2:00pm

Hi,

I need to use the ADC’s at a low level (via register access). Before getting started, I dumped out the ADC registers, to see what is currently in them. From the data below, I can see that ADC1 is being used, and that it is monitoring the controller’s pin PA5 (a.k.a. ADC12_IN5 or Cerbuino pin A1), which is correct since I have a POT connected to pin A1 of my project and have it configured as AnalogInput

What I would like to confirm is that ADC2 and/or ADC3 is available for me to use, without concern that something in the firmware is going to throw me curve-balls later on. Does anybody know where I can find this information?

Thanks.

PS. Here is the dump of the registers associated with ADC on my Cerbuino … ADC = Common Registers, ADCx[1…3] = ADC1, ADC2, ADC3 specific registers


 0000 0000 0000 0000 0000 0000 0001 0000 :ADC_CSR
 0000 0000 0000 0000 0000 0000 0000 0000 :ADC_CCR
 0000 0000 0000 0000 0000 0000 0000 0000 :ADC_CDR

 0000 0000 0000 0000 0000 0000 0001 0000 :ADC1_SR
 0000 0000 0000 0000 0000 0000 0000 0000 :ADC1_CR1
 0000 0000 0000 0000 0000 0000 0000 0001 :ADC1_CR2
 0000 0000 0000 0000 0000 0000 0000 0000 :ADC1_SQR1
 0000 0000 0000 0000 0000 0000 0000 0000 :ADC1_SQR2
 0000 0000 0000 0000 0000 0000 0000 0101 :ADC1_SQR3
 0000 0000 0000 0000 0000 0000 0000 0000 :ADC1_JSQR
 0000 0000 0000 0000 0000 0000 0000 0000 :ADC1_JDR1
 0000 0000 0000 0000 0000 0000 0000 0000 :ADC1_JDR2
 0000 0000 0000 0000 0000 0000 0000 0000 :ADC1_JDR3
 0000 0000 0000 0000 0000 0000 0000 0000 :ADC1_JDR4
 0000 0000 0000 0000 0000 0000 0000 0000 :ADC1_DR

 0000 0000 0000 0000 0000 0000 0000 0000 :ADC2_SR
 0000 0000 0000 0000 0000 0000 0000 0000 :ADC2_CR1
 0000 0000 0000 0000 0000 0000 0000 0000 :ADC2_CR2
 0000 0000 0000 0000 0000 0000 0000 0000 :ADC2_SQR1
 0000 0000 0000 0000 0000 0000 0000 0000 :ADC2_SQR2
 0000 0000 0000 0000 0000 0000 0000 0000 :ADC2_SQR3
 0000 0000 0000 0000 0000 0000 0000 0000 :ADC2_JSQR
 0000 0000 0000 0000 0000 0000 0000 0000 :ADC2_JDR1
 0000 0000 0000 0000 0000 0000 0000 0000 :ADC2_JDR2
 0000 0000 0000 0000 0000 0000 0000 0000 :ADC2_JDR3
 0000 0000 0000 0000 0000 0000 0000 0000 :ADC2_JDR4
 0000 0000 0000 0000 0000 0000 0000 0000 :ADC2_DR

 0000 0000 0000 0000 0000 0000 0000 0000 :ADC3_SR
 0000 0000 0000 0000 0000 0000 0000 0000 :ADC3_CR1
 0000 0000 0000 0000 0000 0000 0000 0000 :ADC3_CR2
 0000 0000 0000 0000 0000 0000 0000 0000 :ADC3_SQR1
 0000 0000 0000 0000 0000 0000 0000 0000 :ADC3_SQR2
 0000 0000 0000 0000 0000 0000 0000 0000 :ADC3_SQR3
 0000 0000 0000 0000 0000 0000 0000 0000 :ADC3_JSQR
 0000 0000 0000 0000 0000 0000 0000 0000 :ADC1_JDR3
 0000 0000 0000 0000 0000 0000 0000 0000 :ADC3_JDR2
 0000 0000 0000 0000 0000 0000 0000 0000 :ADC3_JDR3
 0000 0000 0000 0000 0000 0000 0000 0000 :ADC3_JDR4
 0000 0000 0000 0000 0000 0000 0000 0000 :ADC3_DR

Architect · January 11, 2013, 2:12pm

If it is not used now, I doubt that it is going to change in the future for that particular board. You should be safe.

JackN · January 11, 2013, 2:15pm

@ Architect - Tx.

As a follow-up, I did a few additional tests. I configured AnalogInput on all of the available A pins. Each AnalogInput.Read() shows up in the ADC as an individual conversion (1 channel per regulare group) in the sequence that you call them. Even if you call the Read() on multiple AnalogInputs, they are serialized through ADC1. I did this to make sure that more extensive use of the AnalogInput.Read() on multiple pins would not change the fact that only ADC1 seems to be used.

My conclusion … I am going ahead and will use ADC2 and ADC3 for my own evil purposes I will update this post if I discover anythign that contradicts the above.