17 channel Logic Analyzer for free

This is not really a GHI topic but I suppose it very interesting for all the hardware freaks here.

I wrote an open-source 17 channel Logic Analyzer for the Parallel (Printer) Port.


* Digital Oscilloscope / Logic Analyzer with up to 17 input lines
* Uses the parallel (printer) port for input.
* While Logic Analyzers normally are very expensive, this one is for zero cost
* Written in speed optimized C++ to get the maximum possible sample rates
* The program is a stand alone single EXE file which neither needs any additional DLLs nor any framework. It runs out of the box
* Runs on all Windows platforms (95, 98, ME, NT, 2000, XP, 2003, Vista, 2008, Windows 7, 2008 R2)
* Runs on 32 Bit Windows and 64 Bit Windows
* When first run, installs a driver to access hardware IO ports on all NT platforms
* Plays a sound via PC speaker to prove that the driver works correctly
* Shows the actual state of the input lines life in the LED's of the GUI
* Captures up to 500.000 samples / second (depending on your hardware and OS)
* Captures to memory (rather than disk) for maximum speed
* Capturing runs always with the maximum frequency that the hardware allows
* Memory saving capture technology stores only the changes of the input lines rather than storing all lines with each sample that is taken
* The capture process is independent of data analyzing so you can try various settings to display the captured data in the best way
* The analyzer generates coloured oscilloscope diagrams with a raster grid
* The output is written into an HTML file and one or multiple GIF files
* So the analyzer results can easily be shared with other people who must not install any program to view a proprietary binary format
* You can write an individual heading into each analyzer output to distinguish them later in a multitude of files
* When analyzing data, you can choose to delete old analyzer output or keep the old files
* The time axis shows absolute or relative time with microsecond precision (Performance Counter)
* Automatic detection of inactive input lines shows only the channels that have activity
* Automatic detection of idle time cuts out long phases of inactivity
* Automatic detection of input frequency chooses the adequate raster unit like on a real oscilloscope (10 µs, 20 µs, 25 µs, 50 µs, 100 µs, etc..)
* Automatic detection of context switches of the operating system
* Decoded serial data (Start Bit, Parity, Acknowledge, Stop Bit) and the Byte that they represent may be printed into the diagrams and/or printed to HTML where it can be copied to the clipboard.
* Decoded serial data (Start Bit, Parity, Acknowledge, Stop Bit) and the Byte that they represent is written into the diagram
* Very cleanly written source code with a proper error handling and plenty of comments



This looks great. Thanks for sharing the link.

This would be awesome if I still had a computer that had a parallel port… :wink:

Thanks for sharing!

You can buy a Parallel PCI card.
They are very cheap.


We had a similar discussion going on another thread regarding the SUMP open source software for logic analyzers. Have you considered making your data compatible?



Have you considered making your data compatible?

I’m not working anymore on this project.

Did you read the article ?
How would you convert the information about Conext Switches to be transferred to SUMP ?

Generally I think it is a bad idea to write a LogicAnalyzer software in slow Java.
My LogicAnalyzer already has its own graphical output written in speed optimized C++.

Additionally the results of my LogicAnalyzer are Html and GIF so you can send them to anybody who will be able to see them without having to install any software.


Java client is for visualization and initial setup. Sampling is done on the hardware behind. Results of the analysis can be saved as HTML.