For our products we have the have the power of a PC for internet connectivity. I realize that the focus right now is on IoT, and we are still working on the G400D based design so this is down the road somewhat.
But I would be interested in the USB client (using WinUSB as the Windows device driver) capabilities of the Cortex M7 processor(s) selected for SITCore, specifically if USB 2.0 High Speed, and how many end points are available. Ideally having two end points for bulk transfers, and one or two end points for interrupt transfers would be required.
My plan B is to use a Cypress USB chip to meet these requirements, the down side there is the USB FIFO buffers expect a 8 or 16 bit access as one would get if interfaced on to the processor bus. Possibly a 16 or 32 bit SPI interface to an FPGA FIFO which would then be connected to the Cypress USB FIFOs, would give use something closer to the high speed rates, and many times better then full speed.
P.S. This is low priority question but mainly just wanted to set the scope of SITCore products.