That is true. I just somehow always seem to hit the 1% nobody else need to worry about in my projects
This was a very strange set of circumstances. To summarise for those interested, hereās why every āstandardā avenue turned into a dead end. Iām pretty sure this isnāt the case with most other modules, but an interesting learning experience none the less. Iām not going to detail again how I got to these conclusions - just take this as simple lessons learntā¦
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You canāt read asynchronous data with the USART module if the data stream isnāt properly framed with a start bit and a stop bit. NETMF allows for a Zero stop bits setting, but the LPC2388 doesnāt support it.
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You canāt use interrupts to capture signals changing faster than about 100uS (10kHz). This is just an estimate based on my experiments.
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You canāt ābit bangā capture a signal faster than about 10kHz either. In other words it doesnāt help sitting in a tight loop recording bit transitions. A read/store cycle takes longer than 50uS - more like 150-200uS depending on what youāre doing. Interrupts actually worked better than brute force.
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You canāt use the built-in NETMF SPI class for bit rates below a couple of hundred kHz because it hardcodes the prescaler value and overwrites the register every time Write() executes. I had to use registers to get to a ālowā bit rate of 65uS and pretty much write my own SPI class from scratch. The Register class is my new best friend - thanks GHI!
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The SSP module is a wonderful thing. It can be used for things unrelated to SPI and is very flexible. Iām glad I learnt this one. Read the section in the LPC23xx user manual.
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However, you canāt wait for a low to high transition on the MISO line and then start clocking in data under about 80 - 100uS. NETMF is too slow with a āwhile(!SCIO.Read)ā and thereās nothing in the hardware to do it. Unfortunately this is how the module signals to the processor that thereās new data and you need to respond fast. This is not standard SPI.
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Finally, you canāt get SSP to output a constant, uninterrupted clock stream (and capture data at the same time). Not even with DMA. It creates a small delay between every 16 bits. I couldnāt find a workaround to this.
I cannot think of a reason TI chose to implement this very non-standard and difficult to use protocol, but itās been like that since the 90ās. The bottom line is that sometimes you just need a different tool for the job. Where most jobs are easily done with C# and NETMF, this is one example of something best done with C and inline assembler on a dedicated processor.
Iāll let you all know how it goes with Plan B. Thanks for all the help and support so far.