SPI in 3Pin mode (MISO,MOSI,SCK) and user have control over CS

NETMF & Gadgeteer
21

Moi,

The way it works is the way most uC support. I dont remember any uC that can handle CS in this way by its own.

Take RLP into account if speed is an issue. Using that you could benefit of both worlds. I did a chart recorder recently where I adquire an analog signal (From ECG) and transmit over USB on a real time basis (1 ten bit sample, 1ms period) and its quite easy. Data adquisition is made on native side and USB transport on .NET, the whole program is not longer than 50 lines. The whole thing would be much difficult to implement and debug on native side without the support of a programmer/debugger and of course it would be more expensive.

22

Architect,

The ADC is the ADS7953.

Pablo,

Thanks for the info on RLP. I will give it a try.

Thanks guys for all your feedback.

23

@ Moi, thanks.

I looked at the datasheet and the SPI implementation in the micro framework source code. As far as I can see, it would not be that hard to add.

You can make a request on mf site to add this functionality. Who knows may be they can put it in one of the next releases of the framework.

24

Architect,

I did go to microsoft and posted this:

Hello,

I am evaluating a small board hosting micro .net framework
right now I have a ADC chip interface with my board via SPI,
and the way this ADC chip works, it needs to have chip select line
transition from idle state to active state per 16-Bit transaction.

The SPI.WriteRead() works find if I only do one 16-Bit transaction at a time.
The CS line transitions from idle state to active state and back once the transaction is finished.

The problem arises when I do a Write/Read using more than one transaction:

SPI.WriteRead(WrteBuf,0,20,ReadBuf,0,20,0)

the CS line transitions from idle to active state starting the first transaction, but then remains low through out the rest, thus, my ADC does not respond as intended because it requires CS to transition on every 16-Bit Write Frame.

Any ideas on how to go about modifying the SPI class to function as such?

and got this response:

you will not be able to do that because the most interestign things about SPI transactions happen at the driver level. what you can do is to opena issue at http://netmf.codeplex.com so we can provide the plumbing for our OEM to provide the right driver implementation when they write the drivers. Today there is no way for them to know whether they should toggle the CS line only once or for every sub-transaction.

Regards
Lorenzo

I will let you guys know what happens.
Thanks.

25

Moi, some chips expect the CS pin to toggle between transactions but most chips do not rely on CS pin in the same way. Unfortunately, there is no specifications on this so you may find this or that case.

Since it is more common and faster to only handle CS on the whole chunk of data, NETMF team decided to it this way.

Thanks to our exclusive RLP feature, you can implement your own native SPI drivers. Your driver should expose the same methods as the built in SPI but only change the way CS is handled. In the NETMF porting kit, you will find the complete SPI drivers for LPC24xx, take those and recompile to whatever fits your needs.

26

Gus,

Thanks for your reply and comments.

Pablo suggested using RLP as well.
So I guess it is RLP then.

Thanks.

27

Yes, like an extra boolean parameter in WriteRead method that will indicate if CS toggle is needed.

Anyways as Gus said the function you interested in inside the porting kit is:

BOOL LPC24XX_SPI_Driver::Xaction_nWrite16_nRead16( SPI_XACTION_16& Transaction )