Project - RLP in Depth

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21

Version 1.1 online.

Main differences:

  • Added Hydra
  • Adapted to GHI SDK 4.3.4
  • Added section explaining multiple RLP image loading
  • First paragraphs about RLP extensions.
  • added and revised examples and templates
8 Likes
22

Excellent, thanks

23

Thank you Simon! :clap:

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@ Simon from Vilnius - I recon that the cerberus template can be used for the first generation cerb40s as well.

I just managed to revive two cerb40 from having no FW to the latest (4.3.4 and 4.3.6) after updating the HW to 20 pin dil and rtc stuff and I am about to experiment a bit with RLP …

BTW, how the hell can the GPIO (PBx preferably) directly be addressed in RLP ?

Looking at the data sheet it gives me only some AHB1 and f.e. GPIOB at addr 0x4002 0400 but I only need to address the output bits, having only 16 of them shouldn’t take 1024 address spaces or ?

Any pointers to example, refs, dox, I’m from the 80s, stopped with PIAs and VIAs so I guess things have evolved a bit since than … and I am probably taking things to easy by assuming that I [em]‘only’[/em] need to set the output bits …

Basic question how do I set a couple of outputs (to ‘0’ or ‘1’) by anding the full 16 bits (or more or less) and masking the maybe used bits by doing:

PBIO &= some_ hexvalue_masking_the_used_bits;

As far as I can see on Cerb I need to mask out bits 2, 6 - 11, 14 and 15 (LSB->MSB) if I want to use the BP bits on the Cerbuino headers.

And this of course in RLP not in C# …

Thanks anyway for your time …

25

Noob question: Where?

Edit: Durr. Nevermind. It helps to read the full thread. :smiley:

Edit #2:

That was a fantastically useful (and entertaining) document. I am finally excited about RLP. Thanks for your work!

26

You’ve got two options.

  1. Since Cerberus has full RLP support, you can use extensions. Check RLP.h file, it has a bunch of methods for controlling pins (“Writepin”, “Readpin” and others). Dig Codeshare for actual usage examples, I definitely saw some.

  2. You can use bare metal features. Check stm32F4xx.h file, it has all the definitions. What particularly interests you, is:

typedef struct {
        __IO uint32_t MODER;    /*!< GPIO port mode register,               Address offset: 0x00      */
        __IO uint32_t OTYPER;   /*!< GPIO port output type register,        Address offset: 0x04      */
        __IO uint32_t OSPEEDR;  /*!< GPIO port output speed register,       Address offset: 0x08      */
        __IO uint32_t PUPDR;    /*!< GPIO port pull-up/pull-down register,  Address offset: 0x0C      */
        __IO uint32_t IDR;      /*!< GPIO port input data register,         Address offset: 0x10      */
        __IO uint32_t ODR;      /*!< GPIO port output data register,        Address offset: 0x14      */
        __IO uint16_t BSRRL;    /*!< GPIO port bit set/reset low register,  Address offset: 0x18      */
        __IO uint16_t BSRRH;    /*!< GPIO port bit set/reset high register, Address offset: 0x1A      */
        __IO uint32_t LCKR;     /*!< GPIO port configuration lock register, Address offset: 0x1C      */
        __IO uint32_t AFR[2];   /*!< GPIO alternate function registers,     Address offset: 0x20-0x24 */
    } GPIO_TypeDef;

So setting a pin would look something like GPIOA->ODR |= (1<<[em]yourPinNumberHere[/em]). It seems that everybody manipulates whole ports, not individual pins these days, but does that really matter? :slight_smile:

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@ Simon from Vilnius - Thanks for the tips, I’ll try and have a go

I’d rather set the whole register with the bits in ONE and operation than do a rotation over left multiple times. I reckon that the 8X ROL operation takes more cycles than 1x AND operation. That, would be a waste of cycles. Plus the fact that I have to blend out (mask) certain bits and as far as I know the ROL inserts a ‘0’ after the action. Way back in time we ought to have a distinction between rolling and shifting bits.

Have to set the bits as accordingly in the attached picture. Where X is/are the bit(s) that I’d like to set.

Excuse me my ignorance but how many bits are the registers ? 32 ?

Is the MSB shifted to a carry bit or overflow bit somewhere or just gone forever ?

Can a piece of code (C/C++) from some ARM taken to another ARM MCU, with corrections on probably the I/O, timers and ?

Ah, probably too many noob questions, any recommendations on a good read on the ARM / STM stuff ?

Or is someone planning on a kind of workshop with a focus on RLP ? (Germany would be fine, or not too far from).

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That must be some really ancient stuff as I have [em]no [/em]idea what are you talking about :slight_smile:

To set pins:

GPIOB->ODR|=(1<<0)|(1<<1)|(1<<3)|(1<<4)|(1<<5)|(1<<12)|(1<<13);

The clear the same pins:

GPIOB->ODR&=~((1<<0)|(1<<1)|(1<<3)|(1<<4)|(1<<5)|(1<<12)|(1<<13));

Yes, but some bits may be reserved — check the manual…

No shifting happens here.

No problems with core stuff, but peripherals will probably need porting…