Is it possible to add RAM?

Thanks for all the info. I’m still planning on doing this, I’ve been getting into native code (to expose processor features and render graphics, etc.). I bet I can pull it off. Aside from your help (someday I will be one of you) the guy who sits on my left is a Russian mathematician who writes native code for microprocessors (specifically the STM Cortex-M line for a few years). The guy to my right is a seasoned electrical engineer. I’m not I’m trying to be lazy asking for walkthroughs or code, in my mind that’s one of the best things about netmf. I have have been given permission to share our hardware code. Eventually it will have been worth helping me.

Along those lines, what about using RAM over SPI? Seems like it’s been done before. My flash runs at 30-100Mhz (or something like that) but it’s slow writing (reading is decent) and it will eventually die. I can’t responsibly use it for many things I’d like to cache.

http://ghielectronics.com/community/codeshare/entry/275

What about a chip like this?

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While you’re in there, you should whip us up some Cerb firmware with Watchdog and Hibernate :wink:

I mean really, what good is a three headed dog that can’t keep watch… or even lie down on command!!!

If you’re talking about this code…

http://www.ghielectronics.com/community/codeshare/entry/722

I feel a tad sorry for early adopters. The Watchdog feature works fine (even if it isn’t pretty). …But the SPI BusyPin needs work. Before reading data you need to sync up with the BusyPin (so you don’t read in the middle of the first dataset), etc. I’ll get that sorted out soon.

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I’ve been compiling my own firmware for a while now with GCC 4.6. Having access to the runtime source, and being able to easily compile it, is the main reason I love netmf.

Thank you so much, this is exactly what I needed. And I will share my working code for others so your post won’t have been a waste of time.

I found this example, http://www.coocox.org/show_exam/FSMC/455.html

Part of why I love netmf is that it gives me an excuse to learn more native code. I’ll try an add a new CPP file for memory init, but if I run into problems I’ll just use IO_Init for now and let someone else tackle that issue later.

This seems simple enough. I do need to use both internal and external, but I don’t need to load the firmware into RAM so I won’t be modifying the scatter files.

…We’re about to build a new board with external memory so I’ll be getting to this project in the next few weeks. Thanks again so much.

I’m planning on using the IS62WV25616BLL which will give me 512KB (~$5). A few years ago I never would have considered that a significant amount of memory. Now it seems like more than enough.

@ untitled

Have you succeeded with additional RAM integration?
Because i’m trying to enable SDRAM on discovery board, and having some issues.
Can you please share, are you was able to accomplish it?

I’m waiting on my new boards with the SRAM. I will be posting my runtime binary and source once I’ve got it working.

But Synchronous Dynamic Random Access Memory is not Static Random Access Memory. I don’t think it’s supported out of the box. You could do something creative (http://www.myplace.nu/avr/dram/index.htm) but that’s not a good solution since it wastes CPU cycles and is sort of slow.

Of course, as soon as I post I realize my info is out dated. The STM32F4 line now supports SDRAM and a TFT, accelerated graphics, etc…

I know what I’m doing this weekend…

I wasn’t able to figure out how to get this SRAM working properly. I put the code to init the SRAM in my IO_Init.cpp, I changed my platform_selector to use the correct memory address…

#define SRAM1_MEMORY_Base 0x60000000
#define SRAM1_MEMORY_Size 0x00800000

Now when I run my app I see these lines in the debug output…

Invalid address 20000a50 and range 4 Ram Start 60000000, Ram end 60800000
Invalid address 20000abc and range 4 Ram Start 60000000, Ram end 60800000
Invalid address 200074d0 and range 4 Ram Start 60000000, Ram end 60800000

…Etc.

Is something hard coded for that internal SRAM?

I think you have to adjust scatter file. Relocate stack, vectors table and heap to new location.

Of course, so I adjusted the scatterfile and now it doesn’t boot. Which means my init code probably isn’t working properly? I’ll be getting back to this in a day or so, I had to switch to other priorities for now.

Hello,

For external ram of Cerberus and for my discoveryboard of ST I’m building a serial SPI RAM module.

So i can attach with a simple spi interface some extra ram to do some storing like examples files from a sd card etc.

The module has an 128Mb SDRAM on board so you will get 8Mb x 8 byte, because it is an 16-bit SDRAM module and as this moment only the 8bit bus is working.

I

I’d buy one of your SPI RAM modules. That could be really useful for prototyping with the GHI boards. Specifically the Cerb products. I love them but they don’t quite have enough memory.

Ok, I had to change my addressing from 16bits to 8bits because I didn’t connect my UB and LB pins from the SRAM to my MCU. :\ This also means I only have access to 256KB instead of 512KB. I’ll get that fixed eventually, for now I’m fine with things as they are.

Much thanks to everyone for helping me make this happen!

Ok, I wrote something up for the codeshare…

https://www.ghielectronics.com/community/codeshare/entry/884

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