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<HYDRA> GPIO init for SW I2C (bit-banging)


#1

Hi.

I implemented I2C in SW (in RLP mode) on Hydra. In case you wondering why - I needed to be able to answer on several addresses from one Hydra. It’s not possible using HW I2C.

Now it’s working pretty well, but with some I2C masters I get strange “problems”. It looks like with Hydra the clock line is less stable. I thought it’s somehow affected by the way I’m initializing the GPIO’s I’m using.
Can you guys please take a look at it and maybe have some suggestions?


//GPIO init for clock and data I/O
SLAVE_EMUL_REG->ENABLE_PIO = CLOCK | DATA;	//enable PIO
SLAVE_EMUL_REG->OUTPUT_DISABLE = 0xFFFFFFFF;	//disables output on all linesinterrupt
SLAVE_EMUL_REG->OPEN_DRAIN_ENA = CLOCK | DATA;//enable Multi-driver
SLAVE_EMUL_REG->PULL_UP_ENABLE = CLOCK | DATA;//enable Pull-up
//SLAVE_EMUL_REG->ENA_INPUT_FILTER = CLOCK | DATA;//enables input filtering on clock and data

Any help would b very appreciated!
THANKS!


#2

Looks about right to me. The only I thing I would check is the sequence (just in case there is a dependency).

Can you tell more about the strange “problems”?