Here’s what I’ve found in CPU’s spec:
5.2 Programmable I/O Lines Power Supplies
The power supplies pins VDDIOM support two voltage ranges. This allows the device to reach
its maximum speed either out of 1.8V or 3.3V external memories.
The maximum speed is MCK on the pin SDCK (SDRAM Clock) loaded with 30pF for power supply
at 1.8V and 50 pF for power supply at 3.3V.
The maximum speed on the other signals of the External Bus Interface (control, address and
data signals) is 50 MHz.
The voltage ranges are determined by programming registers in the Chip Configuration registers
located in the Matrix User Interface.
At reset, the selected voltage defaults to 3.3V nominal and power supply pins can accept either
1.8V or 3.3V. The user must make sure to program the EBI voltage range before getting the
device out of its Slow Clock Mode.
The PIO lines are supplied through VDDIOP and the speed of the signal that can be driven on
them can reach 50 MHz with 50 pF load.
So it seems I need to configure that EBI register. I’m not good enough in electronics so not sure I understand it all right.
Now that EBI register is providing the next bit for configuration:
VDDIOMSEL: Memory voltage selection
0 = Memories are 1.8V powered.
1 = Memories are 3.3V powered.
So it allows me to configure memory voltage. It’s not really helping as memory voltage is HW requirement and I’m 99% that given memory on Hydra will not work on 1.8v and I also can’t see how it will affect my Parallel I/O voltages.