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G120 RLP debug


#1

Hi all,

Mainly for speed improvement on a G120 board I wrote an MMC interface, SD card driver and implemented the open source FatFS file system all in RLP. All works really fine until NETMF (GC) Garbage collection runs. I need to break in the RLP code with a debugger but the G120 only has the SWDIO pins available. As far as i know SWDIO can only be activated with JTAG communication. My Questions: are the JTAG pins available on the test pads on the G120 PCB or does someone know how to force SWDIO mode

Thanks!


#2

According to the schematic pin 43 is the SWCLK and pin 44 is the SWDIO of the SWD-Interface on the G120 SOM. The SWD-interface normaly activates itself when it recognises a connected debugger. But I think SWD-debugging isn’t that userfriendly as the visual-studio-debugger, I think without the complete source and an IDE it’s nearly impossible.
Can you maybe run (and maybe debug) the RLP-code on its own on another platform just to be sure the code itself works fine?


#3

The code was developed on another board with the same MCU as the G120… Otherwise it would have been impossible to develop something like this :slight_smile: According to the data-sheet of the LPC1788 i just read that first JTAG communication is necessary before SWDIO can be established. I expect that the test pads on the PCB connects to the JTAG pins… @GHI any help?


#4

We enable CRP3 on the G120 so access via JTAG is not possible.


#5

Now you are challenging me :wink: